One common image reproduction method in image processing devices such as digital copiers, scanners, printers and fax machines is as follows: The image data received from a host is put in a bit-mapped image based upon a block unit as a division unit according to a print language. Subsequently, to save memory space, the image data is temporarily compressed and is stored in a memory device. When the image data is to be printed, one page of the image data is prepared in the compressed state, and the decompressed is outputted via the DMA for each band. The DMA output is performed by a DMA controller. For example, Japanese Patent Nos. 2603123 and 2515367 disclose the DMA controllers.
For the image processing at an image processing device, there is no problem if the memory capacity is sufficient and one page of the image data is copied in the image memory. However, when the image memory capacity is smaller than one page of the image data, a control process by the DMA controller becomes necessary. In this case, the prior art technology uses two memory areas for one band of image data. One memory area is used for the decompressed image data for memory write while the other one is for the output of the image data for memory read. The two areas in the limited memory space are toggled. To practice the above described toggling, two DMA controllers are used, and their roles are divided. One DMA controller performs the operation of the decompressed image data while the other DMA controller performs the read operation of the image data in the memory. Furthermore, the DMA controllers register the descriptor information in their register, and the direct access memory operation is performed according to the descriptor information. For example, the descriptor information includes a chain address to indicate a storage address for a next descriptor and a data transfer-address indicative of a beginning address of the next data transfer destination.
In order for the two DMA controllers to efficiently toggle for processing to the image memory, it is necessary to control the activation or the chain operation of the DMA controllers based upon the band unit of the image data. In the conventional technology, the above described control is performed by the software installed in the image processing device. If the two DMA controllers are toggled by the software and the printing speed of the image forming unit is relatively slow, there is no substantial problem. However, as the printing speed of the image forming unit becomes faster, it is more difficult for the software to interrupt for the toggling operation. In other words, when the image forming unit is at a high printing speed, since the toggling by the DMA controllers between the decompressed image data for memory write and the output of the image data for memory read must be also at a high speed, the information processing speed by the toggling software in the image processing device may not keep up with the above high speed. As a result, the overall performance undesirably deteriorates. It is also undesirable that the software itself is overly complex.
For the above described reasons, it remains desirable to improve the image processing performance in forming images using the memory capacity of a less than one page of image data and by toggling between the two DMA transferring processes.